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Signal Integrity

Signal integrity (SI) is keeping a signal recognisable from driver to receiver. At low speed a trace is just a wire. Once the edge is fast relative to the trace length, the trace becomes a transmission line and reflections, ringing and crosstalk appear.

When does a trace become a transmission line?​

Rule of thumb: treat it as a transmission line when the trace is longer than about 1/6–1/10 of the edge's rise distance. It's the rise time, not the clock frequency, that matters β€” a slow clock with sharp edges still rings.

Reflections & termination​

  • A mismatch between the source impedance, the trace impedance and the load causes part of the signal to reflect back β†’ overshoot, undershoot, ringing.
  • Fix with termination:
    • Series (source) termination β€” a resistor at the driver matching the trace (common for point-to-point digital).
    • Parallel / Thevenin termination β€” at the receiver (buses, fast clocks).
  • Set the trace to a controlled impedance (see Impedance & Stackup).

Crosstalk​

  • Energy couples between traces that run close and parallel.
  • Reduce it: increase spacing (the 3W rule β€” spacing β‰₯ 3Γ— trace width), keep a solid reference plane, shorten parallel runs, and route adjacent layers orthogonally.

Practical SI checklist​

  • Identify the fast nets (clocks, USB, DDR, fast SPI) β€” they need SI care
  • Controlled impedance + solid reference plane under them
  • Terminate where the datasheet/length requires
  • Keep parallel runs short; honour 3W spacing
  • Minimise vias/stubs on critical nets
Return path is half of SI

A signal's quality depends on its return current as much as the trace itself. See Return Paths & Grounding.

See also​